This invention relates to buffer circuitry and, more particularly, to a clock generator (buffer) circuit useful as part of a random access memory.
The article entitled "Dynamic Depletion Mode: An E/D MOSFET Circuit Method" by R. W. Knepper, 1978 IEEE International Solid-State Circuits Conference Digest of Technical Papers, Vol. 21, pages 16 and 17 (FIG. 2), describes a driver (buffer) circuit which provides output signal levels which are the same as input signal levels and which uses enhancement and depletion mode field effect transistors. One problem with this circuit is that the response time is slower than is desirable in many applications. One reason for this is that the gate of depletion transistor T4 is connected to the input terminal. This causes terminal 2 (one of the bootstrap terminals) to rapidly discharge as the input signal switches from a low to a high level and thereby slows the response time of the circuit.
A circuit of complexity comparable to the circuit of the above-described publication, but with improved response time, is desirable.